Accelerators for Big Data InternBookmark This
Intel's Accelerator Architecture Lab, a sub-group of Intel Labs, is researching architectures that incorporate unconventional accelerator hardware to greatly improve performance/Watt on machine learning, graph, analytics, and other Big Data applications. We are seeking an intern to develop Xeon Phi- and/or FPGA-based accelerators for these
application types during the Summer of 2014. The successful candidate will analyze applications to determine the regions that would most benefit from acceleration, will implement accelerators for these regions, and will work with our runtime development team to develop techniques to automatically allocate tasks to CPUs and accelerators.
Must be pursuing a MS or PhD in computer science or related field.
Candidate must have 6+ months of work or educational experience with the following:
-Applicants must have experience implementing one or more big data applications on accelerators such as GPUs, Xeon Phi, or FPGAs.
-Applicants must currently be enrolled in a full-time graduate degree program.
Skill in parallel programming, C/C++, and runtime scheduling is desirable.