PDG-Peripheral Connectivity Hub/Circuit Design Engineer Intern (MS/PhD Level) 2014

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Intel Corporation
Santa Clara, CA
Application Deadline: No Deadline
Position: Full-time, Unpaid

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Come intern with Intel's Product Developmemt Group (PDG) in the Chipset Development team as a Peripheral Connectivity Hub

(PCH) Circuit Design Intern Engineer. In this position, you will be responsible for circuit design and simulation of next generation of Intel's chipset products. You will be part of a team that will work on complex IP development.

Responsibilities will include, but are not limited to: 
- Understand circuit design concept and transistor level behavior
- Work cross-geo with stakeholders that may own Back-End partition design, SoC RTL, FC integration and Architectural Validation
- Work with teams to implement late design changes to meet product LZs
- Ensure all product goals are met for the design owned

The ideal candidate should exhibit the following behavioral traits:
- Problem-solving skills
- Ability to multitask
- Strong written and verbal communication skills
- Ability to work in a dynamic and team oriented environment

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:
- Must be pursuing MS or PhD in Electrical Engineering, Computer Engineering, Computer Science or other science/engineering related field.
- Must have the unrestricted right to work in the US without requiring sponsorship
Preferred Qualifications:
- Experience with circuit design

How To Apply

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