PDG Undergraduate Intern (BS Level) 2014

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Intel Corporation
Santa Clara, CA
Application Deadline: No Deadline
Position: Full-time, Unpaid

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Description

Job Description:

Come intern with Intel's Product Development Group (PEG). Responsibilities may be quite diverse in a technical nature and will vary significantly depending on the unique needs of the role, U.S. experience and education requirements. Job assignments may be for the summer or for short periods throughout the school year.  

Depending on your skills and interests, your duties will be applied within the entire scope of design development including writing new tests in C and/or developing perl scripts to execute to established Test Plans, debugging complex units and failing tests, running regressions in various validation platforms including modeling environments, SLE and FPGA, synthesize RTL, write Verilog/VHDL code, write debug tools, or author embedded firmware.
Your work will directly contribute to the design and health of DHG products 

The ideal candidate should exhibit the following behavioral traits:
- Problem-solving skills
- Ability to multitask
- Strong written and verbal communication skills - Ability to work in a dynamic and team oriented environment
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:
- Must be pursuing a BS in Electrical Engineering, Computer Engineering, Computer Science or other science/engineering related field. - At the BS level only, must have the unrestricted right to work in the US without requiring sponsorship - Minimum of 3 months experience with software/programming languages (i.e. C, C++,Perl, Python, Java, etc.) - Minimum of 3 months experience with RTL digital design, test-benches, simulation, validation and/or modeling theory
- Minimum of 3 months experience with System Verilog* and/or Verilog* and/or VHDL and UNIX
- Minimum of 3 months experience with computer architecture and VLSI design concepts. Preferred Qualifications:

- Minimum of 3 months experience with FPGAs, synthesis, and validation experience, Video codec, cryptography, graphics knowledge, background in Information Theory, Video and Graphics concepts 

Depending on your skills and interests, your duties will be applied within the entire scope of design development including writing new tests in C and/or developing perl scripts to execute to established Test Plans, debugging complex units and failing tests, running regressions in various validation platforms including modeling environments, SLE and FPGA, synthesize RTL, write Verilog/VHDL code, write debug tools, or author embedded firmware.
Your work will directly contribute to the design and health of DHG products 

How To Apply

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