Failure Analysis Intern

Requirements: Currently enrolled in a Master’s or Doctoral degree in MSE, ECE or similar engineering degree program. Prerequisite Skills and Experience: Familiarity with electronic device fabrication processing technology and device mask layout principles are preferred. Familiarity with epitaxial growth of GaN high electron mobility transistor (HEMT) on SiC and Silicon substrates.

Prior experience with electrical probe testing/curve tracing and high-resolution optical microscopy. Understand the capabilities of acoustic microscopy, focused ion beam (FIB) cross sectioning, secondary electron microscopy (SEM) inspection, scanning transmission electron microscopy (STEM) analysis and have versatility in the Microsoft Office Suite and statistical analysis software such as JMP. Direct experience in one or more of these characterization techniques is preferred.

Excellent oral and written communication skills and will be expected to present data and findings both verbally and in written reports. Additional Desirable Skills: Familiarity with principles and characterization of radio frequency transistor devices. Familiarity with mask layout principles and the ability to view .gds files in a layout editor.

Familiarity with epitaxial wafer characterization methods (e.g., sheet resistance mapping, photoluminescence mapping, etc.)